OpenWrt Development List

Joerg Eilers | 8 Oct 18:56

REV 17856: brief description on ifxmips uart uploadable image??

Hi all,
and please forgive me, if it is the wrong place to ask.

In rev 17856 "blogic" (thanks for your work on amazon/danube) added the possibility to upload an u-boot
image via uart, if got it right. I really would like to understand how to use it, but obviously am too dull .
I have an "Easybox A801" (ARV452CQW-B-LF-IR from Arcadyan) with an BRN bootloader and thought this
feature might help me to get linux/openwrt running. So I built openwrt and got the .asc-file. The first
question: Where (address) do I have to load it to? I tried the default given by BRN (0x80002000) but it
doesn't seem to work.
Anybody able (and willing) to give me a helping hand?

Thank you very much!

Regards

Joerg

-- 
Jetzt kostenlos herunterladen: Internet Explorer 8 und Mozilla Firefox 3.5 -
sicherer, schneller und einfacher! http://portal.gmx.net/de/go/atbrowser

--

-- 
GRATIS für alle GMX-Mitglieder: Die maxdome Movie-FLAT!
Jetzt freischalten unter http://portal.gmx.net/de/go/maxdome01

headers

Spudz76 | 8 Oct 20:22

Re: REV 17856: brief description on ifxmips uart uploadable image??

I do not know specifically about the hardware you are working with, but based on general boot processes I know from other flash-based embedded platforms, the clue you may need is to use the uncompressed and non-bootstrapped image for external boot. If you upload the compressed and bootstrapped image (aka what would go in flash) then the bootstrap is going to begin uncompressing the actual image on top of itself and nuke into failure (or, not be able to find the data to uncompress and hang). If your uploaded/external image is the one that the flash bootstrap would uncompress into RAM then it boots up just like it would have from flash. So you probably need to find the uncompressed and non-bootstrapped code image in the tree and use that instead of the one designed for flash, and your load address may already be correct (it was just overwriting itself or otherwise crashing).

I'm sure someone else that knows the exact hardware you are asking about will chime in with specifics, but I thought in the mean time this clue might get you on the right track to figuring it out for yourself.

-T

On Thu, Oct 8, 2009 at 11:56, Joerg Eilers <Max.Muster <at> kaffeeschluerfer.com> wrote:

Hi all,
and please forgive me, if it is the wrong place to ask.

In rev 17856 "blogic" (thanks for your work on amazon/danube) added the possibility to upload an u-boot image via uart, if got it right. I really would like to understand how to use it, but obviously am too dull .
I have an "Easybox A801" (ARV452CQW-B-LF-IR from Arcadyan) with an BRN bootloader and thought this feature might help me to get linux/openwrt running. So I built openwrt and got the .asc-file. The first question: Where (address) do I have to load it to? I tried the default given by BRN (0x80002000) but it doesn't seem to work.
Anybody able (and willing) to give me a helping hand?

Thank you very much!

Regards

Joerg

--
Jetzt kostenlos herunterladen: Internet Explorer 8 und Mozilla Firefox 3.5 -
sicherer, schneller und einfacher! http://portal.gmx.net/de/go/atbrowser

--
GRATIS für alle GMX-Mitglieder: Die maxdome Movie-FLAT!
Jetzt freischalten unter http://portal.gmx.net/de/go/maxdome01
_______________________________________________
openwrt-devel mailing list
openwrt-devel <at> lists.openwrt.org
https://lists.openwrt.org/mailman/listinfo/openwrt-devel

_______________________________________________
openwrt-devel mailing list
openwrt-devel <at> lists.openwrt.org
https://lists.openwrt.org/mailman/listinfo/openwrt-devel

headers

Ralph.Hempel | 9 Oct 09:37

Re: REV 17856: brief description on ifxmips uart uploadable image??

Hello Joerg,

> .asc-file. The first question: Where (address) do I have to 
> load it to? I tried the default given by BRN (0x80002000) but 
> it doesn't seem to work.

... I'm not familar with this box. The mentioned uboot for RAM is for Danube/Twinpass based boards. Usually
it's used in conjunction with the ROM Code of this devices.

Which device is used within your box? Could you attach a bootlog - pls?

br
Ralph

headers

Max.Muster@kaffeeschluerfer.com | 9 Oct 16:09

Re: REV 17856: brief description on ifxmips uart uploadable image??

Hello Ralph,

thanks for your reply. The device is DANUBE based and should be very 
similar to the SMC-7908-ISP (also produced by Arcadyan).
There are some pictures of my router and board at  this site
   danfuh.de/blog/tag/arcadyan
(its not my site)

My "biggest" problem seems to be that there is no u-boot but the BRN 
bootloader on the device.
I will add the first lines of the bootlog her, the complete log is 
attached (I hope this is possible?!?)

Thanks again

Joerg

<----------------------------------------------------------------------------------------------------------------------->

ROM VER: 1.0.3
CFG 01
Readà
ROM VER: 1.0.3
CFG 01
Read EEPROMX
 X

=======================================================================
Wireless ADSL Gateway DANUBE Loader V0.63.3 build Nov 30 2007 15:50:57
                    Arcadyan Technology Corporation
=======================================================================
MXIC MX29LV320ABTC bottom boot 16-bit mode found

Copying boot params.....DONE

Press Space Bar 3 times to enter command mode ...123
Yes, Enter command mode ...

[DANUBE Boot]:!

Enter Administrator Mode !

======================
 [#] Set Serial Number
 [0] Use Normal Firmware
 [1] Use ART-Testing Firmware
 [9] Taggle ART Firmware Enable/Disable
 [A] Set MAC Address
 [E] Erase Flash
 [G] Run Runtime Code
 [H] Set Options
 [M] Upload to Memory
 [P] Print Boot Params
 [R] Read from Memory
 [T] Memory Test
 [U] Upload to Flash
 [V] Set Board Version
 [W] Write to Memory
 [Y] Go to Memory
 [Z] Dump DDR Ram Register
======================

[DANUBE Boot]:g

Image[1] at 0xb0070000, len:1542145, type:0
Image[2] at 0xb01e8c00, len:252838, type:10
Image[3] at 0xb0226800, len:218826, type:11
Image[4] at 0xb025c000, len:208009, type:12
Image[5] at 0xb028f000, len:150724, type:50
Image[6] at 0xb02b4000, len:148343, type:60
Image[7] at 0xb02d8400, len:452105, type:90
Firmware image at 0, ART image at -1

Run-up Normal Firmware...

Unzipping firmware at 0x80002000 ... [ZIP 3] [ZIP 1]  done
Run-time code running ...

In c_entry() function ...
install_exception
Co config = 80008483
[INIT] Interrupt ...
##### _ftext      = 0x80002000
##### _fdata      = 0x805BC0E0
##### __bss_start = 0x80663F44
##### end         = 0x81B8C09C
allocate_memory_after_end> len 687716, ptr 0x81b940a0
##### Backup Data from 0x805BC0E0 to 0x81B9409C~0x81C3BF00 len 687716
##### Backup Data completed
##### Backup Data verified
[GPIO FLOW] SetGpio() Begin ..
gptu: totally 6 16-bit timers/counters
Init timer = 0
************************ LED all ON
************************ LED all OFF
[GPIO FLOW] SetGpio() End.
[INIT] System Log Pool startup ...
[INIT] MTinitialize ..
[INIT] usrclk
CPU Clock 333333334 Hz
mips_counter_frequency:166666667
r4k_offset: 00028b0a(166666)
init_US_counter : time1 = 22 , time2 = 40000077, diff 40000055
US_counter = 68
 cnt1 40669511 cnt2 40671304, diff 1793
Runtime code version: 10.02.206
System startup...
[INIT] Memory COLOR 0, 2400000 bytes ..
[INIT] Memory COLOR 1, 1048576 bytes ..
[INIT] Memory COLOR 2, 2516576 bytes ..
MXIC MX29LV320ABTC bottom boot 16-bit mode found
Set flash memory layout to Boot Parameters found !!!
Bootcode version: V0.63.3
Serial number: R8293XXXXX
Hardware version: E(Xxº
V0.63.3
T_WAN_CLONE_INT=26
[BUILD-WPA]: Key:BD cptime=40608026/1000, offtime=166340498/1000
New cls: id=2, bw=8162 ns/byte, maxd=0 c_list=0x80CF3F60
danube_sw_chip_init: in Reverse MII mode
[rtl8306_setLedMode] modeCur 7fff mode 3
[mac_0_init] call rtl8306_setAsicIGMPMLDSnooping()...
[VLAN] port: 0x000f, ifCount=1
------->add port 0 to vlan 1
------->add port 1 to vlan 1
------->add port 2 to vlan 1
------->add port 3 to vlan 1
mac_0_init: interface 1 registered to VLAN 1, port_mask=f
[rtl8306_setLedMode] modeCur 7fff mode 3
***** [iput_IpLinkUp] ifno=1, link_type:12
TRAP(linkUp) : send ok!
Interface 1 ip = 192.168.2.1

Ralph.Hempel at infineon.com schrieb:
> Hello Joerg,
>
>   
>> .asc-file. The first question: Where (address) do I have to 
>> load it to? I tried the default given by BRN (0x80002000) but 
>> it doesn't seem to work.
>>     
>
> ... I'm not familar with this box. The mentioned uboot for RAM is for Danube/Twinpass based boards.
Usually it's used in conjunction with the ROM Code of this devices.
>
> Which device is used within your box? Could you attach a bootlog - pls?
>
> br
> Ralph
> _______________________________________________
> openwrt-devel mailing list
> openwrt-devel <at> lists.openwrt.org
> https://lists.openwrt.org/mailman/listinfo/openwrt-devel
>
>


ROM VER: 1.0.3
CFG 01
Readà
ROM VER: 1.0.3
CFG 01
Read EEPROMX
 X

=======================================================================
Wireless ADSL Gateway DANUBE Loader V0.63.3 build Nov 30 2007 15:50:57
                    Arcadyan Technology Corporation
=======================================================================
MXIC MX29LV320ABTC bottom boot 16-bit mode found

Copying boot params.....DONE

Press Space Bar 3 times to enter command mode ...123
Yes, Enter command mode ...

[DANUBE Boot]:!

Enter Administrator Mode !

======================
 [#] Set Serial Number
 [0] Use Normal Firmware
 [1] Use ART-Testing Firmware
 [9] Taggle ART Firmware Enable/Disable
 [A] Set MAC Address
 [E] Erase Flash
 [G] Run Runtime Code
 [H] Set Options
 [M] Upload to Memory
 [P] Print Boot Params
 [R] Read from Memory
 [T] Memory Test
 [U] Upload to Flash
 [V] Set Board Version
 [W] Write to Memory
 [Y] Go to Memory
 [Z] Dump DDR Ram Register
======================

[DANUBE Boot]:g

Image[1] at 0xb0070000, len:1542145, type:0
Image[2] at 0xb01e8c00, len:252838, type:10
Image[3] at 0xb0226800, len:218826, type:11
Image[4] at 0xb025c000, len:208009, type:12
Image[5] at 0xb028f000, len:150724, type:50
Image[6] at 0xb02b4000, len:148343, type:60
Image[7] at 0xb02d8400, len:452105, type:90
Firmware image at 0, ART image at -1

Run-up Normal Firmware...

Unzipping firmware at 0x80002000 ... [ZIP 3] [ZIP 1]  done
Run-time code running ...

In c_entry() function ...
install_exception
Co config = 80008483
[INIT] Interrupt ...
##### _ftext      = 0x80002000
##### _fdata      = 0x805BC0E0
##### __bss_start = 0x80663F44
##### end         = 0x81B8C09C
allocate_memory_after_end> len 687716, ptr 0x81b940a0
##### Backup Data from 0x805BC0E0 to 0x81B9409C~0x81C3BF00 len 687716
##### Backup Data completed
##### Backup Data verified
[GPIO FLOW] SetGpio() Begin ..
gptu: totally 6 16-bit timers/counters
Init timer = 0
************************ LED all ON
************************ LED all OFF
[GPIO FLOW] SetGpio() End.
[INIT] System Log Pool startup ...
[INIT] MTinitialize ..
[INIT] usrclk
CPU Clock 333333334 Hz
mips_counter_frequency:166666667
r4k_offset: 00028b0a(166666)
init_US_counter : time1 = 22 , time2 = 40000077, diff 40000055
US_counter = 68
 cnt1 40669511 cnt2 40671304, diff 1793
Runtime code version: 10.02.206
System startup...
[INIT] Memory COLOR 0, 2400000 bytes ..
[INIT] Memory COLOR 1, 1048576 bytes ..
[INIT] Memory COLOR 2, 2516576 bytes ..
MXIC MX29LV320ABTC bottom boot 16-bit mode found
Set flash memory layout to Boot Parameters found !!!
Bootcode version: V0.63.3
Serial number: R8293XXXXX
Hardware version: E(Xxº
V0.63.3
T_WAN_CLONE_INT=26
[BUILD-WPA]: Key:BD cptime=40608026/1000, offtime=166340498/1000
New cls: id=2, bw=8162 ns/byte, maxd=0 c_list=0x80CF3F60
danube_sw_chip_init: in Reverse MII mode
[rtl8306_setLedMode] modeCur 7fff mode 3
[mac_0_init] call rtl8306_setAsicIGMPMLDSnooping()...
[VLAN] port: 0x000f, ifCount=1
------->add port 0 to vlan 1
------->add port 1 to vlan 1
------->add port 2 to vlan 1
------->add port 3 to vlan 1
mac_0_init: interface 1 registered to VLAN 1, port_mask=f
[rtl8306_setLedMode] modeCur 7fff mode 3
***** [iput_IpLinkUp] ifno=1, link_type:12
TRAP(linkUp) : send ok!
Interface 1 ip = 192.168.2.1

gConfig.Interface[2].IP_Addr = 0.0.0.0
gConfig.Interface[2].Subnet_Mask = 0.0.0.0
danube pci startup...
PCI clock 33.3MHz
cut-off PCI internal clock
DANUBE_GPIO_P1_ALTSEL0=5c7
DANUBE_GPIO_P1_ALTSEL1=0
DANUBE_GPIO_P1_DIR=91f6
Ralink vendor id: 0x1814
[HWLAN] ifno=2 irno=7 port=0x00000000
[INFO] wlan: 0.8.4.2 (Atheros/multi-bss)
[INFO] ath_hal: 0.9.17.1 (AR5212, RF5111, RF5112, RF2413, DEBUG, REGOPS_FUNC)
[INFO] ath_rate_atheros: Version 2.0.1
Copyright (c) 2001-2004 Atheros Communications, Inc, All Rights Reserved
[INFO] ath_pci: 0.9.4.5 (Atheros/multi-bss)
[PCI] devtag=00000070 probe=800e7154
[HWLAN] PCI_AH_probe() Begin ..
##### We detect Nala(2417) without EEPROM #####
[HWLAN] devtag = 00000070
[HWLAN] Vendor ID 0x168c
[HWLAN] Device ID 0x1d
[HWLAN] Base Addr 0xb8000000
[HWLAN] SVendor ID 0x0
[HWLAN] SDevice ID 0x0
[HWLAN] Revision ID 0x1
[HWLAN] interrupt vector 0x1
ath_pci_probe :
ath_pci_probe : dev->name wifi0
call ath_attach 1 : dev 8103421c n32 MinPow = 0
ar5212GetChipPowerLimits, Chan 2467: MaxPow = 36 MinPow = 0
ar5212GetCh0x80002
[init_if] local_wirelessif_mask=0xf00004
[init_if] localorVPN_if_mask=0xf80007
Init NAT data structure
RUNTASK id=3 if_task if0...
RUNTASK id=4 if_task if1...
RUNTASK id=5 if_task if2...
RUNTASK id=6 if_task if3...
RUNTASK id=7 if_task if20...
RUNTASK id=8 if_task if21...
RUNTASK id=9 if_task if22...
RUNTASK id=10 if_task if23...
RUNTASK id=11 timer_task...
RUNTASK id=12 conn_mgr...
RUNTASK id=13 main_8021x...
Build Day = Nov 27 2008
RUNTASK id=14 saveRandomSeedTask...
[VFS_init] Start...
[VFS_init] vfsState:1
codePageInit() TimeZone:23, codePage:CP850, cPID:5, cpSize:256, toUpSize:30
==[vfs_register_filesystem]============================
list size:7,  Method:0x805c0f74
  1) Type:0x01, Name:FAT12
  2) Type:0x04, Name:FAT16
  3) Type:0x06, Name:FAT16
  4) Type:0x0b, Name:FAT32
ssc_init() = 0
call ifx_ssc_open() = 0
SPI_Init!
RUNTASK id=31 apAppInit...
Rqm_cbq_resetcls] warning: the cls(8) might be too slow to cause int overflow
ptime=2000000000/1000, cptime=18446744073709551615/1000, offtime=18446744073709551615/1000
aft rst: id=8, bw=1191722 ns/byte, maxd=0 ms,
         maxb=16, minb=4, avgpktsz=250, maxpktsz=1802,
         offtime=1212204, parent=81b89628, borrow=81b89628
         pri=4, maxidle=0, minidle=-4294966,
         maxq=48, clsfg=23
f=98010/100000, inverse_f=102030/100000, ns_per_byte=8162432/1000
ptime=2000000000/1000, cptime=40608026/1000, offtime=166340498/1000
aft rst: id=9, bw=8162 ns/byte, maxd=0 ms,
         maxb=16, minb=4, avgpktsz=250, maxpktsz=1802,
         offtime=166, parent=81b89628, borrow=81b89] Allocate resource 99, FreeResource = 3
[33] Allocate resource 100, FreeResource = 4
[33] Allocate resource 101, FreeResource = 5
sizeof(struct ap_cm)=256
RUNTSK ISDN_ApCM 14
### CAPI 2.0 / 2.018
### Nbr. of ctrls = 2
     ctrl 1: nbr. of B-chnls=2, global opts=0x451
             B1 prots=0x3, B2 prots=0x2, B3 prots=0x1
     ctrl 2: nbr. of B-chnls=2, global opts=0x451
             B1 prots=0x3, B2 prots=0x2, B3 prots=0x1
>>> CAPI_REGISTER (2048/1/8/2048), applId=1
>>> CAPI_REGISTER (2048/1/8/2048), applechnologies AG
[31] Allocate mailbox 6
TAPI_init_task_queue: enter loop..6
[32] ev 0, inode 3 mpsCh 4
ifx_mps_open, inode 4
VMMC_Open --> 80e25860
VMMC_handle[3] : 80e25860
VMMC_Open : Major 122 Minor 14
VMMC_LL_Open, nDev 0, inode 4 mpsCh 5
ifx_mps_open, inode 5
VMMC_Open --> 80e25ccc
VMMC_handle[4] : 80e25ccc
VMMC_Open : Major 122 Minor 15
VMMC_LL_Open, nDev 0, inode 5 mpsCh 6
ifx_mps_open, inode 6
VMMC_Open --> 80e26138
VMMC_handle[5] : 80e26138
VMMC_Open : Major 122 Minor 16
VMMC_LL_Open, nDev 0, inode 6 mpsCh 7
ifx_mps_open, inode 7
VMMC_Open --> 80e265a4
VMMC_handle[6] : 80e265a4
VMMC_Open : Major 122 Minor 17
VMMC_LL_Open, nDev 0, inode 7 mpsCh 8
VMMC_Open --> 80e26a10
VMMC_handle[7] : 80e26a10
VMMC_Open : Major 122 Minor 18
VMMC_LL_Open, nDev 0, inode 8 mpsCh 9
VMMC_Open --> 80e26e7c
VMMC_handle[8] : 80e26e7c
===>
Set PCM I/F 0 VMMC_handle:80e272f8
ifx_mps_ioctl: FIO_MPS_DOWNLOAD...1
[get_vcpufirmware_address] DSP firmware: [6 -1], dCnt:1
Unzipping from B02D8400 to 814B86B0 ... [ZIP 2] done
Uncompressed size = 642816
IFX_MPS: Download firmware (size 642816 bytes)... [PORTABLITY]:WscCreateThread--------------------
 WscCmd:ActualUIThreadProc: Started.
ActualUIThreadProc: wait q
ok!
Version 11.2.4.1.0 up and running...
MasterControl constructor
WscCmd::MC instantiated ok
[PORTABLITY]:WscCreateThread--------------------
 [PORTABLITY]:pthread_mutex_init--------------------
 CTransport Construction
[PORTABLITY]:WscCreateThread--------------------
 In CTransport::ActualCBThreadProc
ActualCBThreadProc: Calling Dequeue
MC::Init: Init complete ok
WscCmd::MC intialized ok
WscCmd::Init ok, starting stack...
Info::ReadConfigFile: Called
Info::ReadConfigFile:[
Info::ReadConfigFile:File open ok
******************uuid_p:0x00000000000000011000001d19xxxxxx*****
mp_deviceInfo->uuid[i]:
0-0-0-0-0-0-0-1-10-0-0-1d-19-xx-xx-xx-
mp_deviceInfo->macAddr:00:1D:19:xx:xx:xx
gSetting.dot1x.if_entry[0].enableWEP:0
authTypeFlags is 2 ,encrTypeFlags is 4 ,m_nwKey is BDA7AA56B, key len is 9
 ssid is EasyBox-XXXXXX
MC::SwitchModeOn: EModeApProxyRegistrar enter
RegistrarSM constructor
[PORTABLITY]:WscCreateThread--------------------
 RegistrarSM constructor
[PORTABLITY]:WscCreateThread--------------------
 [PORTABLITY]:pthread_mutex_init--------------------
 MC::SetBeaconIE: call to trans->SetBeaconIE() ok
MC::SetProbeRespIE: call to trans->SetProbeRespIE() ok
Ê}Ê}
[CreateTlvEsM8Sta] nwKeyLen=9
424441374141353642
mp_deviceInfo->authTypeFlags:2
mp_deviceInfo->encrTypeFlags:4
[CreateTlvEsM8Sta] mp_info->ID=0
*******build M1 start**********
RPROTO: BuildMessageM1_For_REG built: -2134213264 bytes
*******build M1 end**********
after InitializeSM....
in startMonitor....
                   before pDev->bOpen == TRUE
after pDev->bOpen == TRUE
CPC_IO_InstanceInit pDev 80DFBC90 begin
before DUSLI_Init: voice_ivr_channel[4].ivrQueueId = 15
[32] Allocate mailbox 16
VOICE_IVR_Init: voice_ivr_channel[5].ivrQueueId = 16
[32] Allocate mailbox 17
VOICE_IVR_Init: voice_ivr_channel[6].ivrQueueId = 17
[32] Allocate mailbox 18
VOICE_IVR_Init: voice_ivr_channel[7].ivrQueueId = 18
TEL_MGR_DisableDebug
rapi_tmr_cancel: cookie 8149b3fc, Initialized=1
 00000000 81499c28 8149a68c
cookie 8149b3fc 81499c28
cookie 8149b3fc 8149a68c
rapi_tmr_cancel: can't find time structure cookie 8149b3fc
===ath_newstate IEEE80211_M_HOSTAP===
ath_beacon_alloc :
rapi_tmr_cancel: cookie 80aed660, Initialized=1
 00000000 81499c28 8149a68c
cookie 80aed660 81499c28
cookie 80aed660 8149a68c
rapi_tmr_cancel: can't find time structure cookie 80aed660
[reset_802dot1x] wireless module ready
[init_wpa] dot1x_ready[0]=3, ifno=2, dot1x_ifno=0
wlan_confree_do> start ...
ND 6 ???
tkip_detach: should call _MOD_DEC_USE???
ND7 ???
wlan_confree_do> start ...
ND 6 ???
tkip_attache: should call _MOD_INC_USE???
ND7 ???
[init_wpa] dot1x_ready[1]=1, ifno=24, dot1x_ifno=129
[init_wpa] dot1x_ready[2]=1, ifno=20, dot1x_ifno=255
[init_wpa] dot1x_ready[3]=1, ifno=21, dot1x_ifno=255
[init_wpa] dot1x_ready[4]=1, ifno=22, dot1x_ifno=255
[init_wpa] dot1x_ready[5]=1, ifno=23, dot1x_ifno=255
[reset_802dot1x] 802.1Xv2 ready
ce_l4_proc: 44h cause 1h 33h
CF Interrogate Error 3301
Interrogation Diversion fails 3301!
usb_hc_timer_stop() timer_id:5
ce_l4_proc: 44h cause 1h 33h
CF Interrogate Error 3301
Interrogation Diversion fails 3301!
ce_l4_proc: 44h cause 1h 33h
CF Interrogate Error 3301
Interrogation Diversion fails 3301!
ce_l4_proc: 44h cause 1h 33h
CF Interrogate Error 3301
Interrogation Diversion fails 3301!
ce_l4_proc: 44h cause 1h 33h
CF Interrogate Error 3301
Interrogation Diversion fails 3301!
ce_l4_proc: 44h cause 1h 33h
CF Interrogate Error 3301
Interrogation Diversion fails 3301!
Got MODEM_READY_MSG
ADSL Firmware: 2.1.2.13.0.2 [Annex B:0x4208 0x0]
ADSL> READY

_______________________________________________
openwrt-devel mailing list
openwrt-devel <at> lists.openwrt.org
https://lists.openwrt.org/mailman/listinfo/openwrt-devel

headers

Ralph.Hempel | 9 Oct 16:47

Re: REV 17856: brief description on ifxmips uart uploadable image??

Hi Joerg,

fine. Now you have to identify the bootstrap pins. Maybe John knows more about it?

Your mode is 1 (BootSel0 1, BootSel1 0, BootSel2 0) .
We would need the configuration 4 for UART mode (BootSel0 0, BootSel1 0, BootSel2 1) .
The UART boot log should look like ...

>>>
ROM VER: 1.0.3
CFG 04
Read EEPROMX
 X
UART    
<<<

In case that's not possible to identify the correct bootstrap pins you would have to live with the original
bootloader 

Caution:
Loading an owrt kernel with the wrong mtd maps could overwrite the bootloader .

br/R

> -----Original Message-----
> From: Max.Muster <at> kaffeeschluerfer.com 
> [mailto:Max.Muster <at> kaffeeschluerfer.com] 
> Sent: Friday, October 09, 2009 4:09 PM
> To: OpenWrt Development List
> Cc: Hempel Ralph (IFAG WLC SDC SW)
> Subject: Re: [OpenWrt-Devel] REV 17856: brief description on 
> ifxmips uart uploadable image??
> 
> Hello Ralph,
> 
> thanks for your reply. The device is DANUBE based and should be very 
> similar to the SMC-7908-ISP (also produced by Arcadyan).
> There are some pictures of my router and board at  this site
>    danfuh.de/blog/tag/arcadyan
> (its not my site)
> 
> My "biggest" problem seems to be that there is no u-boot but the BRN 
> bootloader on the device.
> I will add the first lines of the bootlog her, the complete log is 
> attached (I hope this is possible?!?)
> 
> Thanks again
> 
> Joerg
> 
> <-------------------------------------------------------------
> ---------------------------------------------------------->
> 
> ROM VER: 1.0.3
> CFG 01
> Readà
> ROM VER: 1.0.3
> CFG 01
> Read EEPROMX
>  X
> 
> 
> 
> ==============================================================
> =========
> Wireless ADSL Gateway DANUBE Loader V0.63.3 build Nov 30 2007 15:50:57
>                     Arcadyan Technology Corporation
> ==============================================================
> =========
> MXIC MX29LV320ABTC bottom boot 16-bit mode found
> 
> Copying boot params.....DONE
> 
> 
> Press Space Bar 3 times to enter command mode ...123
> Yes, Enter command mode ...
> 
> 
> [DANUBE Boot]:!
> 
> Enter Administrator Mode !
> 
> ======================
>  [#] Set Serial Number
>  [0] Use Normal Firmware
>  [1] Use ART-Testing Firmware
>  [9] Taggle ART Firmware Enable/Disable
>  [A] Set MAC Address
>  [E] Erase Flash
>  [G] Run Runtime Code
>  [H] Set Options
>  [M] Upload to Memory
>  [P] Print Boot Params
>  [R] Read from Memory
>  [T] Memory Test
>  [U] Upload to Flash
>  [V] Set Board Version
>  [W] Write to Memory
>  [Y] Go to Memory
>  [Z] Dump DDR Ram Register
> ======================
> 
> [DANUBE Boot]:g
> 
> Image[1] at 0xb0070000, len:1542145, type:0
> Image[2] at 0xb01e8c00, len:252838, type:10
> Image[3] at 0xb0226800, len:218826, type:11
> Image[4] at 0xb025c000, len:208009, type:12
> Image[5] at 0xb028f000, len:150724, type:50
> Image[6] at 0xb02b4000, len:148343, type:60
> Image[7] at 0xb02d8400, len:452105, type:90
> Firmware image at 0, ART image at -1
> 
> Run-up Normal Firmware...
> 
> Unzipping firmware at 0x80002000 ... [ZIP 3] [ZIP 1]  done
> Run-time code running ...
> 
> In c_entry() function ...
> install_exception
> Co config = 80008483
> [INIT] Interrupt ...
> ##### _ftext      = 0x80002000
> ##### _fdata      = 0x805BC0E0
> ##### __bss_start = 0x80663F44
> ##### end         = 0x81B8C09C
> allocate_memory_after_end> len 687716, ptr 0x81b940a0
> ##### Backup Data from 0x805BC0E0 to 0x81B9409C~0x81C3BF00 len 687716
> ##### Backup Data completed
> ##### Backup Data verified
> [GPIO FLOW] SetGpio() Begin ..
> gptu: totally 6 16-bit timers/counters
> Init timer = 0
> ************************ LED all ON
> ************************ LED all OFF
> [GPIO FLOW] SetGpio() End.
> [INIT] System Log Pool startup ...
> [INIT] MTinitialize ..
> [INIT] usrclk
> CPU Clock 333333334 Hz
> mips_counter_frequency:166666667
> r4k_offset: 00028b0a(166666)
> init_US_counter : time1 = 22 , time2 = 40000077, diff 40000055
> US_counter = 68
>  cnt1 40669511 cnt2 40671304, diff 1793
> Runtime code version: 10.02.206
> System startup...
> [INIT] Memory COLOR 0, 2400000 bytes ..
> [INIT] Memory COLOR 1, 1048576 bytes ..
> [INIT] Memory COLOR 2, 2516576 bytes ..
> MXIC MX29LV320ABTC bottom boot 16-bit mode found
> Set flash memory layout to Boot Parameters found !!!
> Bootcode version: V0.63.3
> Serial number: R8293XXXXX
> Hardware version: E(Xxº
> V0.63.3
> T_WAN_CLONE_INT=26
> [BUILD-WPA]: Key:BD cptime=40608026/1000, offtime=166340498/1000
> New cls: id=2, bw=8162 ns/byte, maxd=0 c_list=0x80CF3F60
> danube_sw_chip_init: in Reverse MII mode
> [rtl8306_setLedMode] modeCur 7fff mode 3
> [mac_0_init] call rtl8306_setAsicIGMPMLDSnooping()...
> [VLAN] port: 0x000f, ifCount=1
> ------->add port 0 to vlan 1
> ------->add port 1 to vlan 1
> ------->add port 2 to vlan 1
> ------->add port 3 to vlan 1
> mac_0_init: interface 1 registered to VLAN 1, port_mask=f
> [rtl8306_setLedMode] modeCur 7fff mode 3
> ***** [iput_IpLinkUp] ifno=1, link_type:12
> TRAP(linkUp) : send ok!
> Interface 1 ip = 192.168.2.1
> 
> 
> 
> Ralph.Hempel at infineon.com schrieb:
> > Hello Joerg,
> >
> >   
> >> .asc-file. The first question: Where (address) do I have to 
> >> load it to? I tried the default given by BRN (0x80002000) but 
> >> it doesn't seem to work.
> >>     
> >
> > ... I'm not familar with this box. The mentioned uboot for 
> RAM is for Danube/Twinpass based boards. Usually it's used in 
> conjunction with the ROM Code of this devices.
> >
> > Which device is used within your box? Could you attach a 
> bootlog - pls?
> >
> > br
> > Ralph
> > _______________________________________________
> > openwrt-devel mailing list
> > openwrt-devel <at> lists.openwrt.org
> > https://lists.openwrt.org/mailman/listinfo/openwrt-devel
> >
> >   
>