gmane.comp.gcc.devel

Mohamed Shafi | 15 Jul 08:47

Is this the expected behavior?

Hello all,

I am not sure if this the right mailing list.

I am involved in the porting of gcc 4.1.2 for a 16 bit target.
In some cases i noticed that callee save registers were getting
allocated in the body even though there isn't any function call. I
believe that callee save registers will be allocated only if some
variable values are required across a function call. So if there is no
function call there shouldn't be any callee save registers used in a
function body. So my question is will GCC allocate callee save
registers for function even if the function doesn't call any other
function?
Or is this a gcc bug?

Hope my question is clear.

Regards,
Shafi

headers

Ramana Radhakrishnan | 15 Jul 08:57

Re: Is this the expected behavior?

Hi Mohamed,

Why not ? Callee save registers are after all registers and the split
is in the ABI's head (so to speak). So GCC is well within its right to
use callee save registers. In fact if you were in a leaf function that
did not make any function calls the first preference would be to
allocate caller save registers and then to allocate callee save
registers - Instead of spilling a caller save register , GCC could
very well use a callee save register and the only extra cost would be
saving and restoring context of the callee save register in the
prologue and the epilogue respectively.

HTH.

cheers
Ramana

On Tue, Jul 15, 2008 at 7:50 AM, Mohamed Shafi <shafitvm <at> gmail.com> wrote:
>
> Hello all,
>
> I am not sure if this the right mailing list.
>
> I am involved in the porting of gcc 4.1.2 for a 16 bit target.
> In some cases i noticed that callee save registers were getting
> allocated in the body even though there isn't any function call. I
> believe that callee save registers will be allocated only if some
> variable values are required across a function call. So if there is no
> function call there shouldn't be any callee save registers used in a
> function body. So my question is will GCC allocate callee save

(Continue reading)

headers

Mohamed Shafi | 15 Jul 09:22

Re: Is this the expected behavior?

2008/7/15 Ramana Radhakrishnan <ramana.r <at> gmail.com>:
> Hi Mohamed,
>
>
>
> Why not ? Callee save registers are after all registers and the split
> is in the ABI's head (so to speak). So GCC is well within its right to
> use callee save registers. In fact if you were in a leaf function that
> did not make any function calls the first preference would be to
> allocate caller save registers and then to allocate callee save
> registers - Instead of spilling a caller save register , GCC could
> very well use a callee save register and the only extra cost would be
> saving and restoring context of the callee save register in the
> prologue and the epilogue respectively.
>

   I agree with you, but what about when there are still caller save
register are available and there are no register restrictions for any
instructions? In my case i find that GCC has used only the argument
registers, stack pointer and callee saved registers. So out of the 16
available registers ony 5+1+4 registers were used, even though there
was 6 caller save registers were available

>
> HTH.
>
>
> cheers
> Ramana
>

(Continue reading)

headers

Ramana Radhakrishnan | 15 Jul 09:25

Re: Is this the expected behavior?

<snipped parts of the last mail>

>
>   I agree with you, but what about when there are still caller save
> register are available and there are no register restrictions for any
> instructions? In my case i find that GCC has used only the argument
> registers, stack pointer and callee saved registers. So out of the 16
> available registers ony 5+1+4 registers were used, even though there
> was 6 caller save registers were available

Check your REG_ALLOC_ORDER macro ?

cheers
Ramana
>
>>
>> HTH.
>>
>>
>> cheers
>> Ramana
>>
>> On Tue, Jul 15, 2008 at 7:50 AM, Mohamed Shafi <shafitvm <at> gmail.com> wrote:
>>>
>>> Hello all,
>>>
>>> I am not sure if this the right mailing list.
>>>
>>> I am involved in the porting of gcc 4.1.2 for a 16 bit target.
>>> In some cases i noticed that callee save registers were getting

(Continue reading)

headers

Mohamed Shafi | 15 Jul 09:29

Re: Is this the expected behavior?

2008/7/15 Ramana Radhakrishnan <ramana.r <at> gmail.com>:
> <snipped parts of the last mail>
>
>>
>>   I agree with you, but what about when there are still caller save
>> register are available and there are no register restrictions for any
>> instructions? In my case i find that GCC has used only the argument
>> registers, stack pointer and callee saved registers. So out of the 16
>> available registers ony 5+1+4 registers were used, even though there
>> was 6 caller save registers were available
>
>
> Check your REG_ALLOC_ORDER macro ?

  The order is argument registers, caller save registers and finally
the callee save registers.

>
>
> cheers
> Ramana
>>
>>>
>>> HTH.
>>>
>>>
>>> cheers
>>> Ramana
>>>
>>> On Tue, Jul 15, 2008 at 7:50 AM, Mohamed Shafi <shafitvm <at> gmail.com> wrote:

(Continue reading)

headers

Paolo Bonzini | 16 Jul 11:40

Re: Is this the expected behavior?

Mohamed Shafi wrote:
> 2008/7/15 Ramana Radhakrishnan <ramana.r <at> gmail.com>:
>> <snipped parts of the last mail>
>>
>>>   I agree with you, but what about when there are still caller save
>>> register are available and there are no register restrictions for any
>>> instructions? In my case i find that GCC has used only the argument
>>> registers, stack pointer and callee saved registers. So out of the 16
>>> available registers ony 5+1+4 registers were used, even though there
>>> was 6 caller save registers were available
>>
>> Check your REG_ALLOC_ORDER macro ?
> 
>   The order is argument registers, caller save registers and finally
> the callee save registers.

Are there instructions that only work on the callee-save registers? 
This might confuse regclass (the pass that decides the register class 
preferences).

Paolo