Milkymist (open hardware video synthesizer) development ()

Christopher Head | 14 May 2012 02:16

Navré CBI / SBI instructions

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Hi,
I'm looking into using the Navré. On the OpenCores page, it says that
"All Classic Core instructions implemented, except conditional branches
on I/O registers". However, in the source code I see this comment: "/*
SBIC, SBIS, SBI, CBI are not implemented */". While SBIC and SBIS are
conditional branches on I/O registers, SBI and CBI are not: they're
single-instruction read-modify-writes. So, are these instructions
implemented or not? From looking through the code I can't see anywhere
where they're implemented, but this is my first try reading Verilog
(normally I write VHDL) so I may have missed something.

Thanks!
Chris
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Sébastien Bourdeauducq | 14 May 2012 04:29

Re: Navré CBI / SBI instructions

On 05/14/2012 02:16 AM, Christopher Head wrote:
> While SBIC and SBIS are
> conditional branches on I/O registers, SBI and CBI are not: they're
> single-instruction read-modify-writes. So, are these instructions
> implemented or not?

They are not implemented. JFDI or write your software code so that they 
are not needed (should be easy unless your specific application has 
special performance requirements that those instructions help with).

S.