Fabio Estevam | 5 Jul 01:01 2013
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[PATCH v2 1/3] ASoC: sglt5000: Provide the reg_stride field

From: Fabio Estevam <fabio.estevam <at> freescale.com>

sgtl5000 has 16-bit registers, and only even numbers are valid for its registers
addresses.

Let regmap knows about this feature by specifying the 'reg_stride' field, so 
that it can access only the valid registers.

Signed-off-by: Fabio Estevam <fabio.estevam <at> freescale.com>
---
Changes since v1:
- Fix the description in the commit log

 sound/soc/codecs/sgtl5000.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/sound/soc/codecs/sgtl5000.c b/sound/soc/codecs/sgtl5000.c
index d441559..7c99f3c 100644
--- a/sound/soc/codecs/sgtl5000.c
+++ b/sound/soc/codecs/sgtl5000.c
 <at>  <at>  -1470,6 +1470,7  <at>  <at>  static struct snd_soc_codec_driver sgtl5000_driver = {
 static const struct regmap_config sgtl5000_regmap = {
 	.reg_bits = 16,
 	.val_bits = 16,
+	.reg_stride = 2,

 	.max_register = SGTL5000_MAX_REG_OFFSET,
 	.volatile_reg = sgtl5000_volatile,
--

-- 
1.8.1.2
(Continue reading)

Fabio Estevam | 5 Jul 01:01 2013
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[PATCH v2 2/3] ASoC: sglt5000: Fix the default value of CHIP_SSS_CTRL

From: Fabio Estevam <fabio.estevam <at> freescale.com>

According to the sgtl5000 reference manual, the default value of CHIP_SSS_CTRL
is 0x10.

Reported-by: Oskar Schirmer <oskar <at> scara.com>
Signed-off-by: Fabio Estevam <fabio.estevam <at> freescale.com>
---
Changes since v1:
- None
 sound/soc/codecs/sgtl5000.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/sound/soc/codecs/sgtl5000.c b/sound/soc/codecs/sgtl5000.c
index 7c99f3c..5e9f80b 100644
--- a/sound/soc/codecs/sgtl5000.c
+++ b/sound/soc/codecs/sgtl5000.c
 <at>  <at>  -38,7 +38,7  <at>  <at> 
 static const struct reg_default sgtl5000_reg_defaults[] = {
 	{ SGTL5000_CHIP_CLK_CTRL,		0x0008 },
 	{ SGTL5000_CHIP_I2S_CTRL,		0x0010 },
-	{ SGTL5000_CHIP_SSS_CTRL,		0x0008 },
+	{ SGTL5000_CHIP_SSS_CTRL,		0x0010 },
 	{ SGTL5000_CHIP_DAC_VOL,		0x3c3c },
 	{ SGTL5000_CHIP_PAD_STRENGTH,		0x015f },
 	{ SGTL5000_CHIP_ANA_HP_CTRL,		0x1818 },
--

-- 
1.8.1.2

(Continue reading)

Mark Brown | 5 Jul 11:46 2013

Re: [PATCH v2 2/3] ASoC: sglt5000: Fix the default value of CHIP_SSS_CTRL

On Thu, Jul 04, 2013 at 08:01:02PM -0300, Fabio Estevam wrote:
> From: Fabio Estevam <fabio.estevam <at> freescale.com>
> 
> According to the sgtl5000 reference manual, the default value of CHIP_SSS_CTRL
> is 0x10.

Applied, thanks.
On Thu, Jul 04, 2013 at 08:01:02PM -0300, Fabio Estevam wrote:
> From: Fabio Estevam <fabio.estevam <at> freescale.com>
> 
> According to the sgtl5000 reference manual, the default value of CHIP_SSS_CTRL
> is 0x10.

Applied, thanks.
Fabio Estevam | 5 Jul 01:01 2013
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[PATCH v2 3/3] ASoC: sglt5000: Fix SGTL5000_PLL_FRAC_DIV_MASK

From: Fabio Estevam <fabio.estevam <at> freescale.com>

SGTL5000_PLL_FRAC_DIV_MASK is used to mask bits 0-10 (11 bits in total) of
register CHIP_PLL_CTRL, so fix the mask to accomodate all this bit range.

Reported-by: Oskar Schirmer <oskar <at> scara.com>
Signed-off-by: Fabio Estevam <fabio.estevam <at> freescale.com>
---
Changes since v1:
- None
 sound/soc/codecs/sgtl5000.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/sound/soc/codecs/sgtl5000.h b/sound/soc/codecs/sgtl5000.h
index 4b69229..2f8c889 100644
--- a/sound/soc/codecs/sgtl5000.h
+++ b/sound/soc/codecs/sgtl5000.h
 <at>  <at>  -347,7 +347,7  <at>  <at> 
 #define SGTL5000_PLL_INT_DIV_MASK		0xf800
 #define SGTL5000_PLL_INT_DIV_SHIFT		11
 #define SGTL5000_PLL_INT_DIV_WIDTH		5
-#define SGTL5000_PLL_FRAC_DIV_MASK		0x0700
+#define SGTL5000_PLL_FRAC_DIV_MASK		0x07ff
 #define SGTL5000_PLL_FRAC_DIV_SHIFT		0
 #define SGTL5000_PLL_FRAC_DIV_WIDTH		11

--

-- 
1.8.1.2

(Continue reading)

Mark Brown | 5 Jul 11:46 2013

Re: [PATCH v2 3/3] ASoC: sglt5000: Fix SGTL5000_PLL_FRAC_DIV_MASK

On Thu, Jul 04, 2013 at 08:01:03PM -0300, Fabio Estevam wrote:
> From: Fabio Estevam <fabio.estevam <at> freescale.com>
> 
> SGTL5000_PLL_FRAC_DIV_MASK is used to mask bits 0-10 (11 bits in total) of
> register CHIP_PLL_CTRL, so fix the mask to accomodate all this bit range.

Applied, thanks.
On Thu, Jul 04, 2013 at 08:01:03PM -0300, Fabio Estevam wrote:
> From: Fabio Estevam <fabio.estevam <at> freescale.com>
> 
> SGTL5000_PLL_FRAC_DIV_MASK is used to mask bits 0-10 (11 bits in total) of
> register CHIP_PLL_CTRL, so fix the mask to accomodate all this bit range.

Applied, thanks.
Mark Brown | 5 Jul 11:45 2013

Re: [PATCH v2 1/3] ASoC: sglt5000: Provide the reg_stride field

On Thu, Jul 04, 2013 at 08:01:01PM -0300, Fabio Estevam wrote:
> From: Fabio Estevam <fabio.estevam <at> freescale.com>
> 
> sgtl5000 has 16-bit registers, and only even numbers are valid for its registers
> addresses.

Applied, but note that it's only the second bit of that that makes any
diffrence - the registers could be any size.
On Thu, Jul 04, 2013 at 08:01:01PM -0300, Fabio Estevam wrote:
> From: Fabio Estevam <fabio.estevam <at> freescale.com>
> 
> sgtl5000 has 16-bit registers, and only even numbers are valid for its registers
> addresses.

Applied, but note that it's only the second bit of that that makes any
diffrence - the registers could be any size.
Fabio Estevam | 12 Jul 16:27 2013
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Re: [PATCH v2 1/3] ASoC: sglt5000: Provide the reg_stride field

Hi Mark,

On Fri, Jul 5, 2013 at 6:45 AM, Mark Brown <broonie <at> kernel.org> wrote:
> On Thu, Jul 04, 2013 at 08:01:01PM -0300, Fabio Estevam wrote:
>> From: Fabio Estevam <fabio.estevam <at> freescale.com>
>>
>> sgtl5000 has 16-bit registers, and only even numbers are valid for its registers
>> addresses.
>
> Applied, but note that it's only the second bit of that that makes any
> diffrence - the registers could be any size.

Which branch have you applied this one, please? I am not able to
locate it in any of your branches.
Fabio Estevam | 12 Jul 16:32 2013
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Re: [PATCH v2 1/3] ASoC: sglt5000: Provide the reg_stride field

On Fri, Jul 12, 2013 at 11:27 AM, Fabio Estevam <festevam <at> gmail.com> wrote:
> Hi Mark,
>
> On Fri, Jul 5, 2013 at 6:45 AM, Mark Brown <broonie <at> kernel.org> wrote:
>> On Thu, Jul 04, 2013 at 08:01:01PM -0300, Fabio Estevam wrote:
>>> From: Fabio Estevam <fabio.estevam <at> freescale.com>
>>>
>>> sgtl5000 has 16-bit registers, and only even numbers are valid for its registers
>>> addresses.
>>
>> Applied, but note that it's only the second bit of that that makes any
>> diffrence - the registers could be any size.
>
> Which branch have you applied this one, please? I am not able to
> locate it in any of your branches.

Good, just found it:
https://git.kernel.org/cgit/linux/kernel/git/broonie/sound.git/log/?h=topic/sgtl5000

Gmane