Re: AMD690GM-M2

On 07/10/08 03:32 -0400, Corey Osgood wrote:
> On Tue, Oct 7, 2008 at 2:44 AM, Josh <zorn169 <at> gmail.com> wrote:
> 
> > Hi, I have an AMD690GM-M2.  I noticed that it  is listed on the wiki as a
> > potentially supportable desktop board.  I can confirm that, at least on
> > my board, the BIOS is socketed.  Unfortunately, I didn't notice until
> > after I got the board, that it doesn't have a serial port (or a parallel
> > port for that matter).  I guess that makes things more difficult.
> >
> > If you want any more information on the board, please let me know.
> >
> > Josh
> 
> 
> 
> 00:13.5 USB Controller [0c03]: ATI Technologies Inc SB600 USB
> Controller (EHCI) [1002:4386] (prog-if 20 [EHCI])
> > 	[...]
> > 	Capabilities: [e4] Debug port: BAR=1 offset=00e0
> >
> >
> Not really more difficult, just more expensive. You'll need a USB debug port
> adapter to use for the console. Unless, of course, AMD is in the process of
> porting this board already, in which case you should be able to use VGA
> console once they're done.

Just for future reference - we don't have access to most of our customer's
production platforms.  Usually we can only get our hands on our own
internal designs (and thats why we develop our code against them).  We are
happy to offer our help, of course, but we are not in the process of 
actively porting any production platforms.

Jordan

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Jordan Crouse
Systems Software Development Engineer 
Advanced Micro Devices, Inc.

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Re: AMD690GM-M2

Hi Uwe!

On Tue, 07 Oct 2008, Uwe Hermann wrote:

> On Tue, Oct 07, 2008 at 02:44:32AM -0400, Josh wrote:
...
> 
> I think there _is_ a serial port, see below.

Doh, you're right.  I thought it was supposed to have a serial port,
but didn't think of looking for the header on the board.  The board
didn't come with a connector cable, but at least that's cheap to buy.
... 

> Good, the chip is supported by flashrom.
I'm having troubling finding a place to buy a W39V040B chip in the US.
Looks like avnet.com is a good place to buy an alternative chip,
but I can't to find any information on how to pick a chip that is
compatible.  What criteria do I need to look at when picking out
a different chip.  While I'm at it, I'd like to go with a bigger
chip unless there is a reason not to.
> 
> > superiotool r3511
> > Found ITE IT8726F (id=0x8726, rev=0x1) at 0x2e
> > No dump available for this Super I/O
> 
> Nice, first board with ITE IT8726F we've seen so far. Adding support
> for this Super I/O should be trivial, there's a datasheet and it's
> similar to most other ITE ones, of course.
> 
> The Super I/O itself _does_ support serial though. And, luckily, the
> website says there's a serial header _on_ the board (no serial port per
> se, but you can attach one there). The board should come with a serial
> connector cable, I guess. The header is right below the PCI slots.
> 
> 
> I think we can make this work, but we'll need your help.
cool.

> Next step would be to get a second ROM chip, so that you can make a
> backup of your BIOS using flashrom, and a PLCC extractor (optional).
> If you're sure you have a backup chip stored somewhere safe, the fun
> can begin :)
> 
> We might need some more info, e.g. the output of 'getpir' (a file called
> irq_table.c) and 'mptable' output. Later, also 'superiotool -dV' but we
> need to add IT8726F support to superiotool first...

It didn't look too difficult, so I'm in the process of adding dump
support for IT8726F.  At first glance it seemed pretty similar to
IT8718F.  If I have any questions, I'll let you know.

Thanks,
Josh

/* generated by MPTable, version 2.0.15*/
/* as modified by RGM for coreboot */
#include <console/console.h>
#include <arch/smp/mpspec.h>
#include <device/pci.h>
#include <string.h>
#include <stdint.h>

void *smp_write_config_table(void *v)
{
        static const char sig[4] = "PCMP";
        static const char oem[8] = "LNXI    ";
        static const char productid[12] = "P4DPE       ";
        struct mp_config_table *mc;

        mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
        memset(mc, 0, sizeof(*mc));

        memcpy(mc->mpc_signature, sig, sizeof(sig));
        mc->mpc_length = sizeof(*mc); /* initially just the header */
        mc->mpc_spec = 0x04;
        mc->mpc_checksum = 0; /* not yet computed */
        memcpy(mc->mpc_oem, oem, sizeof(oem));
        memcpy(mc->mpc_productid, productid, sizeof(productid));
        mc->mpc_oemptr = 0;
        mc->mpc_oemsize = 0;
        mc->mpc_entry_count = 0; /* No entries yet... */
        mc->mpc_lapic = LAPIC_ADDR;
        mc->mpe_length = 0;
        mc->mpe_checksum = 0;
        mc->reserved = 0;

        smp_write_processors(mc);

/*Bus:		Bus ID	Type*/
/*I/O APICs:	APIC ID	Version	State		Address*/
	smp_write_ioapic(mc, 2, 0x20, 0xfec00000);
	{
		device_t dev;
		struct resource *res;
		dev = dev_find_slot(1, PCI_DEVFN(0x1e,0));
		if (dev) {
			res = find_resource(dev, PCI_BASE_ADDRESS_0);
			if (res) {
				smp_write_ioapic(mc, 3, 0x20, res->base);
			}
		}
		dev = dev_find_slot(1, PCI_DEVFN(0x1c,0));
		if (dev) {
			res = find_resource(dev, PCI_BASE_ADDRESS_0);
			if (res) {
				smp_write_ioapic(mc, 4, 0x20, res->base);
			}
		}
                dev = dev_find_slot(4, PCI_DEVFN(0x1e,0));
                if (dev) {
			res = find_resource(dev, PCI_BASE_ADDRESS_0);
			if (res) {
				smp_write_ioapic(mc, 5, 0x20, res->base);
			}
                }
                dev = dev_find_slot(4, PCI_DEVFN(0x1c,0));
                if (dev) {
			res = find_resource(dev, PCI_BASE_ADDRESS_0);
			if (res) {
				smp_write_ioapic(mc, 8, 0x20, res->base);
			}
                }
	}
/*I/O Ints:	Type	Polarity    Trigger	Bus ID	 IRQ	APIC ID	PIN#
*//*Local Ints:	Type	Polarity    Trigger	Bus ID	 IRQ	APIC ID	PIN#*/
MP Config Extended Table Entries:

Extended Table HOSED!

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