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Will Deacon | 29 Jun 2012 19:08
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[PATCH 0/4] Extend support for ARMv7 processors

Hello,

This patch series adds support for Cortex-A{5,7,15} processors to operf.
I've added some likely strings for oprofilefs support too but I'm not
sure if I'll merge the corresponding kernel-side changes unless people
really want them.

The first patch also reworks many of the common ARMv7 architectural
events to echo the definitions and terms used by the architecture
reference manual.

All feedback welcome,

Will

Will Deacon (4):
  ARM: update architected ARMv7 event descriptions
  ARM: add support for Cortex-A5 ARMv7 PMU implementations
  ARM: add support for Cortex-A7 ARMv7 PMU implementations
  ARM: add support for Cortex-A15 ARMv7 PMU implementations

 events/Makefile.am               |    3 ++
 events/arm/armv7-ca15/events     |   57 ++++++++++++++++++++++++++++++++++++++
 events/arm/armv7-ca15/unit_masks |    4 ++
 events/arm/armv7-ca5/events      |   15 ++++++++++
 events/arm/armv7-ca5/unit_masks  |    4 ++
 events/arm/armv7-ca7/events      |   10 ++++++
 events/arm/armv7-ca7/unit_masks  |    4 ++
 events/arm/armv7-common/events   |   52 ++++++++++++++++++++++------------
 libop/op_cpu_type.c              |    9 ++++++
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Will Deacon | 29 Jun 2012 19:09
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[PATCH 4/4] ARM: add support for Cortex-A15 ARMv7 PMU implementations

This patch adds support for the Cortex-A15 ARMv7 PMU to OProfile.

Signed-off-by: Will Deacon <will.deacon <at> arm.com>
---
 events/Makefile.am               |    1 +
 events/arm/armv7-ca15/events     |   57 ++++++++++++++++++++++++++++++++++++++
 events/arm/armv7-ca15/unit_masks |    4 ++
 libop/op_cpu_type.c              |    3 ++
 libop/op_cpu_type.h              |    1 +
 libop/op_events.c                |    1 +
 utils/ophelp.c                   |    6 ++++
 7 files changed, 73 insertions(+), 0 deletions(-)
 create mode 100644 events/arm/armv7-ca15/events
 create mode 100644 events/arm/armv7-ca15/unit_masks

diff --git a/events/Makefile.am b/events/Makefile.am
index 79af353..7caf59a 100644
--- a/events/Makefile.am
+++ b/events/Makefile.am
 <at>  <at>  -50,6 +50,7  <at>  <at>  event_files = \
 	arm/armv7-ca9/events arm/armv7-ca9/unit_masks \
 	arm/armv7-ca5/events arm/armv7-ca5/unit_masks \
 	arm/armv7-ca7/events arm/armv7-ca7/unit_masks \
+	arm/armv7-ca15/events arm/armv7-ca15/unit_masks \
 	arm/mpcore/events arm/mpcore/unit_masks \
 	avr32/events avr32/unit_masks \
 	mips/20K/events mips/20K/unit_masks \
diff --git a/events/arm/armv7-ca15/events b/events/arm/armv7-ca15/events
new file mode 100644
index 0000000..c38b403
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Will Deacon | 29 Jun 2012 19:08
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[PATCH 1/4] ARM: update architected ARMv7 event descriptions

This patch updates the common ARMv7 architected event descriptions to
match the latest revision (C) of the ARM ARM in terms of event numbers,
mnemonics and descriptions.

Signed-off-by: Will Deacon <will.deacon <at> arm.com>
---
 events/arm/armv7-common/events |   52 +++++++++++++++++++++++++--------------
 1 files changed, 33 insertions(+), 19 deletions(-)

diff --git a/events/arm/armv7-common/events b/events/arm/armv7-common/events
index c4fe8c7..0b6ed45 100644
--- a/events/arm/armv7-common/events
+++ b/events/arm/armv7-common/events
 <at>  <at>  -1,22 +1,36  <at>  <at> 
-# ARM V7 events
+# Common ARM V7 events
 # From ARM ARM
+# See Sections 30.8.* for definitions of terms and events used here.
 #
-event:0x00 counters:1,2,3,4,5,6 um:zero minimum:500 name:PMNC_SW_INCR : Software increment of PMNC registers
-event:0x01 counters:1,2,3,4,5,6 um:zero minimum:500 name:IFETCH_MISS : Instruction fetch misses
from cache or normal cacheable memory
-event:0x02 counters:1,2,3,4,5,6 um:zero minimum:500 name:ITLB_MISS : Instruction fetch misses from TLB
-event:0x03 counters:1,2,3,4,5,6 um:zero minimum:500 name:DCACHE_REFILL : Data R/W operation that
causes a refill from cache or normal cacheable memory
-event:0x04 counters:1,2,3,4,5,6 um:zero minimum:500 name:DCACHE_ACCESS : Data R/W from cache
-event:0x05 counters:1,2,3,4,5,6 um:zero minimum:500 name:DTLB_REFILL : Data R/W that causes a TLB refill
-event:0x06 counters:1,2,3,4,5,6 um:zero minimum:500 name:DREAD : Data read architecturally
executed (note: architecturally executed = for instructions that are unconditional or that pass the
condition code)
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Will Deacon | 29 Jun 2012 19:09
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[PATCH 2/4] ARM: add support for Cortex-A5 ARMv7 PMU implementations

This patch adds support for the Cortex-A5 ARMv7 PMU to OProfile.

Signed-off-by: Will Deacon <will.deacon <at> arm.com>
---
 events/Makefile.am              |    1 +
 events/arm/armv7-ca5/events     |   15 +++++++++++++++
 events/arm/armv7-ca5/unit_masks |    4 ++++
 libop/op_cpu_type.c             |    3 +++
 libop/op_cpu_type.h             |    1 +
 libop/op_events.c               |    1 +
 utils/ophelp.c                  |    6 ++++++
 7 files changed, 31 insertions(+), 0 deletions(-)
 create mode 100644 events/arm/armv7-ca5/events
 create mode 100644 events/arm/armv7-ca5/unit_masks

diff --git a/events/Makefile.am b/events/Makefile.am
index 1f7e662..8978edc 100644
--- a/events/Makefile.am
+++ b/events/Makefile.am
 <at>  <at>  -48,6 +48,7  <at>  <at>  event_files = \
 	arm/armv7-scorpion/events arm/armv7-scorpion/unit_masks \
 	arm/armv7-scorpionmp/events arm/armv7-scorpionmp/unit_masks \
 	arm/armv7-ca9/events arm/armv7-ca9/unit_masks \
+	arm/armv7-ca5/events arm/armv7-ca5/unit_masks \
 	arm/mpcore/events arm/mpcore/unit_masks \
 	avr32/events avr32/unit_masks \
 	mips/20K/events mips/20K/unit_masks \
diff --git a/events/arm/armv7-ca5/events b/events/arm/armv7-ca5/events
new file mode 100644
index 0000000..a27801e
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Will Deacon | 29 Jun 2012 19:09
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[PATCH 3/4] ARM: add support for Cortex-A7 ARMv7 PMU implementations

This patch adds support for the Cortex-A7 ARMv7 PMU to OProfile.

Signed-off-by: Will Deacon <will.deacon <at> arm.com>
---
 events/Makefile.am              |    1 +
 events/arm/armv7-ca7/events     |   10 ++++++++++
 events/arm/armv7-ca7/unit_masks |    4 ++++
 libop/op_cpu_type.c             |    3 +++
 libop/op_cpu_type.h             |    1 +
 libop/op_events.c               |    1 +
 utils/ophelp.c                  |    6 ++++++
 7 files changed, 26 insertions(+), 0 deletions(-)
 create mode 100644 events/arm/armv7-ca7/events
 create mode 100644 events/arm/armv7-ca7/unit_masks

diff --git a/events/Makefile.am b/events/Makefile.am
index 8978edc..79af353 100644
--- a/events/Makefile.am
+++ b/events/Makefile.am
 <at>  <at>  -49,6 +49,7  <at>  <at>  event_files = \
 	arm/armv7-scorpionmp/events arm/armv7-scorpionmp/unit_masks \
 	arm/armv7-ca9/events arm/armv7-ca9/unit_masks \
 	arm/armv7-ca5/events arm/armv7-ca5/unit_masks \
+	arm/armv7-ca7/events arm/armv7-ca7/unit_masks \
 	arm/mpcore/events arm/mpcore/unit_masks \
 	avr32/events avr32/unit_masks \
 	mips/20K/events mips/20K/unit_masks \
diff --git a/events/arm/armv7-ca7/events b/events/arm/armv7-ca7/events
new file mode 100644
index 0000000..accf280
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Maynard Johnson | 2 Jul 2012 16:13
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Re: [PATCH 0/4] Extend support for ARMv7 processors

On 06/29/2012 12:08 PM, Will Deacon wrote:
> Hello,
> 
> This patch series adds support for Cortex-A{5,7,15} processors to operf.
> I've added some likely strings for oprofilefs support too but I'm not
Those cpu type strings are needed by operf, too.
> sure if I'll merge the corresponding kernel-side changes unless people
> really want them.
> 
> The first patch also reworks many of the common ARMv7 architectural
> events to echo the definitions and terms used by the architecture
> reference manual.
Please remind me when we put out the next release (which should be soon) to add an "Incompatible changes"
section in the release notes to let ARM users know of the event name changes.
> 
> All feedback welcome,
The patches look fine to me, and 'make distcheck' runs clean.  I committed them, but will defer to Richard if
any changes may be required.

By the way, I added the following note in the commit message:

    The part of this patch that adds support for new ARM PMU
    implementations also updates the new function in
    libop/op_cpu_type that was added in the perf-events branch
    so that these new processors can be used with operf.
    For this reason, this patch is currently only being applied
    to the perf-events branch, so support for the new ARM processors
    won't be available in oprofile "mainline" until we merge the
    perf-events branch with the master branch.
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Will Deacon | 2 Jul 2012 23:57
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Re: [PATCH 0/4] Extend support for ARMv7 processors

On Mon, Jul 02, 2012 at 03:13:14PM +0100, Maynard Johnson wrote:
> On 06/29/2012 12:08 PM, Will Deacon wrote:
> > This patch series adds support for Cortex-A{5,7,15} processors to operf.
> > I've added some likely strings for oprofilefs support too but I'm not
> Those cpu type strings are needed by operf, too.

Only on the userspace side though, right?

> > The first patch also reworks many of the common ARMv7 architectural
> > events to echo the definitions and terms used by the architecture
> > reference manual.
> Please remind me when we put out the next release (which should be soon) to add an "Incompatible changes"
section in the release notes to let ARM users know of the event name changes.

Sure! At least CPU_CYCLES is the same, which is probably what most people
use in any scripts.

> > All feedback welcome,
> The patches look fine to me, and 'make distcheck' runs clean.  I committed them, but will defer to Richard if
any changes may be required.

Cheers. I tested them on the relevant CPUs and everything seemed to work.

> By the way, I added the following note in the commit message:
> 
>     The part of this patch that adds support for new ARM PMU
>     implementations also updates the new function in
>     libop/op_cpu_type that was added in the perf-events branch
>     so that these new processors can be used with operf.
>     For this reason, this patch is currently only being applied
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