Andi Kleen | 7 Apr 2011 02:18

oprofile: New version of Intel unit_mask fixes

Sorry for the delay.  I took a look at the Nehalem problem noticed
by Suravee. The core reason is that the Nehalem event list is 
incomplete and missing some of the composite events. I for
now dropped the change for Nehalem, but this should be fixed
later. It's valid for Westmere, where the event list is 
complete.

Please commit now.

Thanks,

-Andi

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Andi Kleen | 7 Apr 2011 02:18

[PATCH 2/2] Remove bogus Westmere event

From: Andi Kleen <ak <at> linux.intel.com>

Remove the latency_above_... event for Westmere. It requires setting special
MSRs that oprofile doesn't support.

Signed-off-by: Andi Kleen <ak <at> linux.intel.com>
---
 events/i386/westmere/unit_masks |    1 -
 1 files changed, 0 insertions(+), 1 deletions(-)

diff --git a/events/i386/westmere/unit_masks b/events/i386/westmere/unit_masks
index e04851d..b137028 100644
--- a/events/i386/westmere/unit_masks
+++ b/events/i386/westmere/unit_masks
 <at>  <at>  -199,7 +199,6  <at>  <at>  name:machine_clears type:exclusive default:0x01
 name:mem_inst_retired type:exclusive default:0x01
 	0x01 loads Instructions retired which contains a load (Precise Event)
 	0x02 stores Instructions retired which contains a store (Precise Event)
-	0x10 latency_above_threshold_0 Memory instructions retired above 0 clocks (Precise Event)
(MSR_INDEX: 0x03F6 MSR_VALUE: 0x0000)
 name:mem_load_retired type:exclusive default:0x01
 	0x01 l1d_hit Retired loads that hit the L1 data cache (Precise Event)
 	0x02 l2_hit Retired loads that hit the L2 cache (Precise Event)
--

-- 
1.7.4

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Xperia(TM) PLAY
It's a major breakthrough. An authentic gaming
smartphone on the nation's most reliable network.
(Continue reading)

Andi Kleen | 7 Apr 2011 02:18

[PATCH 1/2] Turn Westmere unit masks into exclusive

From: Andi Kleen <ak <at> linux.intel.com>

This matches the validated event lists.

Signed-off-by: Andi Kleen <ak <at> linux.intel.com>
---
 events/i386/westmere/unit_masks |   98 +++++++++++++++++++-------------------
 1 files changed, 49 insertions(+), 49 deletions(-)

diff --git a/events/i386/westmere/unit_masks b/events/i386/westmere/unit_masks
index 66665da..e04851d 100644
--- a/events/i386/westmere/unit_masks
+++ b/events/i386/westmere/unit_masks
 <at>  <at>  -15,16 +15,16  <at>  <at>  name:x10 type:mandatory default:0x10
 	0x10 No unit mask
 name:x20 type:mandatory default:0x20
 	0x20 No unit mask
-name:arith type:bitmask default:0x01
+name:arith type:exclusive default:0x01
 	0x01 cycles_div_busy Cycles the divider is busy
 	0x02 mul Multiply operations executed
-name:baclear type:bitmask default:0x01
+name:baclear type:exclusive default:0x01
 	0x01 clear BACLEAR asserted, regardless of cause 
 	0x02 bad_target BACLEAR asserted with bad target address
-name:bpu_clears type:bitmask default:0x01
+name:bpu_clears type:exclusive default:0x01
 	0x01 early Early Branch Prediction Unit clears
 	0x02 late Late Branch Prediction Unit clears
-name:br_inst_exec type:bitmask default:0x7f
(Continue reading)

Andi Kleen | 13 Apr 2011 19:28

Re: [PATCH 1/2] Turn Westmere unit masks into exclusive

Andi Kleen <andi <at> firstfloor.org> writes:

> From: Andi Kleen <ak <at> linux.intel.com>
>
> This matches the validated event lists.

I retract this patch. It seems like the bitmasks still work 
for the majority of the events, so it's better to keep them
now.

-Andi

--

-- 
ak <at> linux.intel.com -- Speaking for myself only

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