KIYOHARA Takashi | 8 Jul 2008 17:10
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Re: mistake the i2c_bitbang direction

Hi! also port-powerpc guys,

First, please see this thread at current-users <at> .

  http://mail-index.netbsd.org/current-users/2008/07/07/msg003400.html

And, I will not understand the specification of i2c.

From: Izumi Tsutsui <tsutsui <at> ceres.dti.ne.jp>
Date: Tue, 8 Jul 2008 04:25:12 +0900

> > > I think mistake to set the direction.  We necessary DIR(INPUT) before READ,
> > > and DIR(OUTPUT) before SETBITS().
> > 
> > No.
> > 
> > DIR() should be used only for SDA, not for SCL.
> > As I noted in the log message, using DIR(INPUT) to read SCL
> > in i2c_wait_for_scl() causes unexpected stop condition
> > in SCL=H, SDA=L and DIR(OUTPUT) case.
> 
> Furthermore, we have to do SETBITS() before DIR(OUTPUT) in some case
> otherwise the device might put unexpected glitch during delay between
> DIR(OUTPUT) and SETBITS().

I think that the following correction is necessary for gpiic of 405Gp
of imb4xx if his correction is correct.

Index: gpiic_opb.c
===================================================================
(Continue reading)

Izumi Tsutsui | 8 Jul 2008 20:48
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Re: mistake the i2c_bitbang direction

kiyohara <at> kk.iij4u.or.jp wrote:

> And, I will not understand the specification of i2c.

http://www.nxp.com/acrobat_download/literature/9398/39340011.pdf

> I think that the following correction is necessary for gpiic of 405Gp
> of imb4xx if his correction is correct.

It looks OPB I2C hardware is implemented properly and
it doesn't require DIR() ops at all, but it might still be
better to have compatibility with other implementation
which will hold SDA output value set during DIR() is INPUT.
(I'm not sure how the DIR() op was defined and designed though)

---

Index: arch/powerpc/ibm4xx/dev/gpiic_opb.c
===================================================================
RCS file: /cvsroot/src/sys/arch/powerpc/ibm4xx/dev/gpiic_opb.c,v
retrieving revision 1.5
diff -u -r1.5 gpiic_opb.c
--- arch/powerpc/ibm4xx/dev/gpiic_opb.c	6 Dec 2007 17:00:33 -0000	1.5
+++ arch/powerpc/ibm4xx/dev/gpiic_opb.c	8 Jul 2008 17:55:52 -0000
 <at>  <at>  -55,6 +55,7  <at>  <at> 
 	bus_space_tag_t sc_bust;
 	bus_space_handle_t sc_bush;
 	uint8_t sc_txen;
+	uint8_t sc_tx;
 	struct i2c_controller sc_i2c;
(Continue reading)

KIYOHARA Takashi | 11 Jul 2008 18:16
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Re: mistake the i2c_bitbang direction

Hi! tsutsui-san,

From: Izumi Tsutsui <tsutsui <at> ceres.dti.ne.jp>
Date: Wed, 9 Jul 2008 03:48:46 +0900

> > I think that the following correction is necessary for gpiic of 405Gp
> > of imb4xx if his correction is correct.
> 
> It looks OPB I2C hardware is implemented properly and
> it doesn't require DIR() ops at all, but it might still be
> better to have compatibility with other implementation
> which will hold SDA output value set during DIR() is INPUT.
> (I'm not sure how the DIR() op was defined and designed though)
> 
> ---
> 
> Index: arch/powerpc/ibm4xx/dev/gpiic_opb.c
> ===================================================================
> RCS file: /cvsroot/src/sys/arch/powerpc/ibm4xx/dev/gpiic_opb.c,v
> retrieving revision 1.5
> diff -u -r1.5 gpiic_opb.c
> --- arch/powerpc/ibm4xx/dev/gpiic_opb.c	6 Dec 2007 17:00:33 -0000	1.5
> +++ arch/powerpc/ibm4xx/dev/gpiic_opb.c	8 Jul 2008 17:55:52 -0000
>  <at>  <at>  -55,6 +55,7  <at>  <at> 

.. snip ..

>  	rv = bus_space_read_1(sc->sc_bust, sc->sc_bush, IIC_DIRECTCNTL) << 2;
>  	rv &= (IIC_DIRECTCNTL_SCC | IIC_DIRECTCNTL_SDAC);

(Continue reading)


Gmane